Digital Logic

Syllabus

1. Introduction
   1. Definitions for Digital Signals
   2. Digital Waveforms
   3. Digital Logic
   4. Moving and Storing Digital Information
   5. Digital Operations
   6. Digital Computer
   7. Digital Integrated Circuits
   8. Digital IC Signal Levels
   9. Clock wave form
   10. Coding
       1. ASCII Code
       2. BCD
       3. The Excess – 3 Code
       4. The Gray Code
2. Digital Logic
   1. The Basic Gates – NOT, OR, AND
   2. Universal Logic Gates – NOR, NAND
   3. AND-OR-INVERT Gates
   4. Positive and Negative Logic
   5. Introduction to HDL
3. Combinational Logic Circuits
   1. Boolean Laws and Theorems
   2. Sum-of-Products Method
   3. Truth Table to Karnaugh Map
   4. Pairs, Quads, and Octets
   5. Karnaugh Simplifications
   6. Don’t Care Conditions
   7. Product-of-Sums Method
   8. Product-of-Sums Simplification
   9. Hazards and Hazard Covers
   10. HDL Implementation Models
4. Data Processing Circuits
   1. Multiplexetures
   2. Demultiplexetures
   3. Decoder
   4. BCD-to-Decimal Decoders
   5. Seven-Segment Decoders
   6. Encoder
   7. Exclusive-OR Gates
   8. Parity Generators and Checkers
   9. Magnitude Comparator
   10. Read-Only Memory
   11. Programmable Array Logic
   12. Programmable Logic Arrays
   13. Troubleshooting with a Logic Probe
   14. HDL Implementation of Data Processing Circuits
5. Arithmetic Circuits
   1. Binary Addition
   2. Binary Subtraction
   3. Unsigned Binary Numbers
   4. Sign-Magnitude Numbers
   5. 2’s Complement Representation
   6. 2’s Complement Arithmetic
   7. Arithmetic Building Blocks
   8. The Adder-Subtracter
   9. Fast Adder
   10. Arithmetic Logic Unit
   11. Binary Multiplication and Division
   12. Arithmetic Circuits Using HDL
6. Flip Flops
   1. RS Flip-Flops
   2. Gated Flip-Flops
   3. Edge-Triggered RS Flip-Flops
   4. Egde Triggered D Flip-Flops
   5. Egde Triggered J K Flip-Flops
   6. Flip-Flop Timing
   7. J K Mater- Slave Flip-Flops
   8. Switch Contacts Bounds Circuits
   9. Varius Representation of Flip-Flops
   10. Analysis of Sequencial Circuits
7. Registers
   1. Types of Registers
   2. Serial In – Serial Out
   3. Serial In – Parallel Out
   4. Parallel In – Serial Out
   5. Parallel In – Parallel Out
   6. Applications of Shift Registers
8. Counters
   1. Asynchronous Counters
   2. Decoding Gates
   3. Synchronous Counters
   4. Changing the Counter Modulus
   5. Decade Counters
   6. Presettable Counters
   7. Counter Design as a Synthesis Problem
   8. A Digital Clock
9. Sequential Machines
   1. Synchronous machines
      1. Clock driven models and state diagrams
      2. Transition tables, Redundant states
      3. Binary assignment
      4. Use of flip-flops in realizing the models
   2. Asynchronous machines
      1. Hazards in asynchronous system and use of redundant branch
      2. Allowable transitions
      3. Flow tables and merger diagrams
      4. Excitation maps and realization of the models
10. Digital Integrate Circuits
    1. Switching Circuits
    2. 7400 TTL
    3. TTL parameters
    4. TTL Overvew
    5. Open Collecter Gates
    6. Three-state TTL Devices
    7. External Drive for TTL Lods
    8. TTL Driving External Loads
    9. 74C00 CMOS
    10. CMOS Characteristics
    11. TTL- to –CMOS Interface
    12. CMOS- to- TTL Interface
11. Applications
    1. Multiplexing Displays
    2. Frequency Counters
    3. Time Measurement